Inline Machine Code Interface

Macros and Header Files

The inline machine code interface provides several header files to assist in using the built-in functions. Two of these, <svc.h> and <code.h> , are common to several of the functions. Others are supplied specifically to help simplify issuing machine instructions without having to write your own calls to the _code function.

Macros and Header Files for Code Generation

The _code header files define macros that can be used to generate specific machine instructions. Each file defines a set of related instructions. For most applications, you need to include only one or two of these files. The header files and a brief description of their contents follow:

<ctl370.h> problem state program control instructions

<das370.h> dual address space instructions

<dec370.h> decimal instructions

<float370.h> floating-point instructions

<genl370.h> general-purpose instructions

<io370.h> 370-mode I/O instructions

<ioxa.h> XA-mode I/O instructions

<lsa370.h> logical string assist instructions

<str370.h> string-handling instructions

<supv370.h> supervisor control instructions

<vec370.h> vector instructions.

The macros have a format that is similar to assembler language instructions. The following example simply illustrates how to use these macros.

If your program needs to issue the CS instruction, which has two registers and a storage area as operands, use the CS macro. Express the register numbers as integers. Express operands that are storage areas as arithmetic expressions using the macro b , which stands for base register. For example, the assembler language instruction

CS 14,15,0(1)

is written using the CS macro as

CS(14,15,0+b(1));

The macro expands into the following, which has the same effect as the assembler instruction but is harder to understand:

_code(0x00030000, 0xbaef, 0x1000);

You should not use register masks in place of register numbers as arguments to these macros. Doing so generates incorrect code or compiler diagnostics, or both.

Note that no macros are provided for instructions that modify registers 4, 5, 12, and 13. Modifying these registers causes subsequent code to fail. The missing instructions are UPT (Update Tree), PC (Program Call), and SIE (Start Interpretive Execution).

The code macros are implemented as calls to other macros, each of which generates a particular instruction format. (For example, the _RX_ macro generates RX format instructions.) These macros are easy to use and enable you to add special instructions, such as emulation instructions, which may be available at your site.

Details on the macros available in each header file are presented on the following pages. Where header files are too extensive to be shown in their entirety, the beginning and ending instructions are given to provide examples of their format.

<genl370.h>

General-Purpose Instructions Header

This header file defines the general-purpose IBM 370 (and XA) instruction set, except for instructions included in <str370.h> , <dec370.h> , and <ctl370.h> and the UPT instruction, which is omitted because it modifies register 5. This set provides most of the instructions in Chapter 7, "General Instructions," in IBM System/370 Principles of Operation.

In general, you do not need to use the instructions in this set because normal C code can be written to produce identical results with less effort. When you use RX format instructions, note that the index register must be specified as a separate argument from the storage base register. (It should be specified as 0 if no index register is required.)

/* ordinary 370 instructions */

#ifndef __Inc_GENL370
#define __Inc_GENL370

#define AR(r1,r2)    _RR_(_R(r1), 0x1a, r1, r2)
#define ALR(r1,r2)   _RR_(_R(r1), 0x1e, r1, r2)
#define NR(r1,r2)    _RR_(_R(r1), 0x14, r1, r2)
#define BALR(r1,r2)  _RR_(_R(r1), 0x05, r1, r2)
#define BASR(r1,r2)  _RR_(_R(r1), 0x0d, r1, r2)
#define BCR(m,r2)    _RR_(0, 0x07, m, r2)
#define BCTR(r1,r2)  _RR_(_R(r1), 0x06, r1, r2)
#define CR(r1,r2)    _RR_(0, 0x19, r1, r2)
#define CLR(r1,r2)   _RR_(0, 0x15, r1, r2)
   .
   .
   .
#define SRL(r1,d)      _RS_(_R(r1), 0x88, r1, 0, d)
#define STCM(r1,m,s)   _RS_(0, 0xbe, r1, m, s)
#define STM(r1,r2,s)   _RS_(0, 0x90, r1, r2, s)
#define CFC(d)         _S_(R1+R2+R3, 0xb21a, d)

   /* UPT not supported due to use of R5
#define UPT()          _E_(R0+R1+R2+R3+R5, 0x0102) */
#define AHI(r1,i2)     _R_(_R(r1),0xa7,r1,0xa,i2)

#endif

<str370.h>

String-Handling Instructions Header

This header file defines the instructions CLC, CLCL, CUSE, MVC, MVCIN, MVCL, NC, OC, TR, TRT, and XC.

/* 370 string instructions */

#ifndef __Inc_STR370
#define __Inc_STR370

#define CLCL(r1,r2)  _RR_(_RP(r1)+_RP(r2), 0x0f, r1, r2)
#define MVCL(r1,r2)  _RR_(_RP(r1)+_RP(r2), 0x0e, r1, r2)
#define NC(s1,l,s2)    _SS1_(0, 0xd4, l, s1, s2)
#define CLC(s1,l,s2)   _SS1_(0, 0xd5, l, s1, s2)
#define XC(s1,l,s2)    _SS1_(0, 0xd7, l, s1, s2)
#define MVC(s1,l,s2)   _SS1_(0, 0xd2, l, s1, s2)
#define MVCIN(s1,l,s2) _SS1_(0, 0xe8, l, s1, s2)
#define OC(s1,l,s2)    _SS1_(0, 0xd6, l, s1, s2)
#define TR(s1,l,s2)    _SS1_(0, 0xdc, l, s1, s2)
#define TRT(s1,l,s2)   _SS1_(R1 + R2, 0xdd, l, s1, s2)
#define CUSE(r1,r2)  _RRE_((_R(r1)+_R(r2)), 0xb257, r1, r2)

#endif

<lsa370.h>

Logical String Assist Instructions

This header file defines the instructions SRST, MVST, and CLST.

/* Logical String Assist instructions */
#ifndef __Inc_LSA370
#define __Inc_LSA370

                                  /* SEARCH STRING                  */
#define SRST(r1,r2)  _RRE_((_R(r1)+_R(r2)), 0xb25e, r1, r2)
                                  /* MOVE STRING                    */
#define MVST(r1,r2)  _RRE_((_R(r1)+_R(r2)), 0xb255, r1, r2)
                                  /* COMPARE LOGICAL STRING         */
#define CLST(r1,r2)  _RRE_((_R(r1)+_R(r2)), 0xb25d, r1, r2)
#endif

<dec370.h>

Decimal Instructions Header

This header file defines the instructions AP, CP, CVB, CVD, DP, ED, EDMK, MP, MVN, MVO, MVZ, PACK, SP, SRP, UNPK, and ZAP.

/* 370 decimal instructions */
#define CVB(r1,x,s)  _RX_(_R(r1), 0x4f, r1, x, s)
#define CVD(r1,x,s)  _RX_(0, 0x4e, r1, x, s)
#define MVN(s1,l,s2)   _SS1_(0, 0xd1, l, s1, s2)
#define MVZ(s1,l,s2)   _SS1_(0, 0xd3, l, s1, s2)
#define ED(s1,l,s2)    _SS1_(0, 0xde, l, s1, s2)
#define EDMK(s1,l,s2)  _SS1_(R1, 0xdf, l, s1, s2)
#define MVO(s1,l1,s2,l2)  _SS2_(0, 0xf1, l1, l2, s1, s2)
#define PACK(s1,l1,s2,l2) _SS2_(0, 0xf2, l1, l2, s1, s2)
#define UNPK(s1,l1,s2,l2) _SS2_(0, 0xf3, l1, l2, s1, s2)
#define AP(s1,l1,s2,l2)   _SS2_(0, 0xfa, l1, l2, s1, s2)
#define CP(s1,l1,s2,l2)   _SS2_(0, 0xf9, l1, l2, s1, s2)
#define DP(s1,l1,s2,l2)   _SS2_(0, 0xfd, l1, l2, s1, s2)
#define MP(s1,l1,s2,l2)   _SS2_(0, 0xfc, l1, l2, s1, s2)
#define SP(s1,l1,s2,l2)   _SS2_(0, 0xfb, l1, l2, s1, s2)
#define ZAP(s1,l1,s2,l2)  _SS2_(0, 0xf8, l1, l2, s1, s2)
#define SRP(s1,l1,s2,i)   _SS3_(0, 0xf0, l1, i, s1, s2)

<float370.h>

Floating-Point Instructions Header

This header file defines the floating-point instruction set, as documented in Chapter 9, "Floating-Point Instructions" in IBM System/370 Principles of Operation.

In general, you do not need to use the instructions in this set because normal C code can be written to produce identical results with less effort. When you use RX format instructions, note that the index register must be specified as a separate argument from the storage base register. It should be specified as 0 if no index register is required.

/* This header file defines several esoteric attributes of the         */
/* 370 floating-point implementation.                                  */

#define FLT_RADIX 16         /* hardware float radix                   */
#define FLT_ROUNDS 0         /* float addition does not round          */

#define FLT_MANT_DIG 6       /* hex digits in float mantissa           */
#define DBL_MANT_DIG 14      /* hex digits in double mantissa          */
#define LDBL_MANT_DIG 14     /* hex digits in long double mantissa     */

#define FLT_DIG 6            /* float decimal precision                */
#define DBL_DIG 15           /* double decimal precision               */
#define LDBL_DIG 15          /* long double decimal precision          */

#define FLT_MIN_EXP -64      /* minimum exponent of 16 for float       */
#define DBL_MIN_EXP -64      /* minimum exponent of 16 for double      */
#define LDBL_MIN_EXP -64     /* minimum exponent of 16 for long double */

#define FLT_MIN_10_EXP -78   /* minimum float power of 10              */
#define DBL_MIN_10_EXP -78   /* minimum double power of 10             */
#define LDBL_MIN_10_EXP -78  /* minimum long double power of 10        */

#define FLT_MAX_EXP 63       /* maximum exponent of 16 for float       */
#define DBL_MAX_EXP 63       /* maximum exponent of 16 for double      */
#define LDBL_MAX_EXP 63      /* maximum exponent of 16 for long double */

#define FLT_MAX_10_EXP 75    /* maximum float power of 10              */
#define DBL_MAX_10_EXP 75    /* maximum double power of 10             */
#define LDBL_MAX_10_EXP 75   /* maximum long double power of 10        */

#define FLT_MAX .7237005e76F             /* maximum float              */
#define DBL_MAX .72370055773322621e76    /* maximum double             */
#define LDBL_MAX .72370055773322621e76L  /* maximum long double        */

#define FLT_EPSILON .9536743e-6F             /* smallest float x such
                                                that 1.0 + x != 1.0    */
#define DBL_EPSILON .22204460492503131e-15   /* smallest double x such
                                                that 1.0 + x != 1.0    */
#define LDBL_EPSILON .22204460492503131e-15L /* smallest long double x such
                                                that 1.0 + x != 1.0    */

#define FLT_MIN .5397606e-78F            /* minimum float              */
#define DBL_MIN .53976053469340279e-78   /* minimum double             */
#define LDBL_MIN .53976053469340279e-78L /* minimum long double        */

<ctl370.h>

Problem Program Control Instructions

This header file defines the instructions BASSM, BSM, CDS, CS, DIAG, EX, IPM, MC, SPM, STCK, SVC, and TS. Because the DIAG, EX, MC, and SVC instructions may have varying effects depending on their operands and environment, these macros have a register mask as an additional final operand. For example, MC(540,0x80,R1+R15) generates the same code as the assembler instruction MC 540,X'80' and informs the compiler that the contents of registers 1 and 15 may be changed. <ctl370.h> also includes an EX_SS macro, to simplify using the EX instruction to execute an SS-format instruction. For example, EX_SS(14,TR(0+b(15),0,0+b(2))) generates code equivalent to the assembler sequence, as shown here:

BALR  1,0
        B     EXINSTR
TARGET  TR    0(0,15),0(2)
EXINSTR EX    14,TARGET

Note that this macro uses register 1 as a work register. To use EX_SS , you must include <genl370.h> in addition to <ctl370.h> and the header file containing the target of the EX instruction.

/* program control instructions */

#ifndef __Inc_CTL370
#define __Inc_CTL370

#define BASSM(r1,r2) _RR_(_R(r1), 0x0c, r1, r2)
#define BSM(r1,r2)   _RR_(_R(r1) & ~R0, 0x0b, r1, r2)
#define SPM(r1)      _RR_(_R(r1), 0x04, r1, 0)
#define EX(r1,x,s,m) _RX_(m, 0x44, r1, x, s)
#define EX_SS(r1,instr) (BAL(1,0,_flabel(0xeeee)), 
                         instr, 
                         _label(0xeeee), 
                         EX(r1,0,0+b(1),0))
#define MC(s,i,m)    _SI_(m, 0xaf, i, s)
#define SVC(i,m)   _I_(m, 0x0a, i)
#define DIAG(r1,r2,i,m)  _RRI_(m, 0x83, r1, r2, i)
#define CS(r1,r2,s)    _RS_(_R(r1)+_R(r2), 0xba, r1, r2, s)
#define CDS(r1,r2,s)   _RS_((_RP(r1))+_RP(r2),0xbb,r1,r2,s)
#define IPM(r1)      _RRE_(_R(r1), 0xb222, r1, 0)
#define STCK(s)  _S_(0, 0xb205, s)
#define TS(s)    _S_(0, 0x9300, s)
#define TRAP2() _E_(0,0x01ff)
#define TRAP4() _S_(0, 0xb2ff, s)

#endif

<supv370.h>

Supervisor Control Instructions Header

This header file defines all the instructions defined in Chapter 10, "Control Instructions" in IBM System/370 Principles of Operation, except those defined in <ctl370.h> and <das370.h> . Both IBM 370 and XA specific instructions are included.

/* 370 supervisor control instructions */

#ifndef __Inc_SUPV370
#define __Inc_SUPV370

#define ISK(r1,r2)   _RR_(_R(r1), 0x09, r1, r2)
#define SSK(r1,r2)   _RR_(0, 0x08, r1, r2)
#define LRA(r1,x,s)  _RX_(_R(r1), 0xb1, r1, x, s)
#define RDD(s,i)     _SI_(0, 0x85, i, s)
#define STNSM(s,i)   _SI_(0, 0xac, i, s)
#define STOSM(s,i)   _SI_(0, 0xad, i, s)
#define WRD(s,i)     _SI_(0, 0x84, i, s)
#define MVCK(s1,r1,s2,r3) _SK_(0, 0xd9, r1, r3, s1, s2)
#define LCTL(r1,r2,s)  _RS_(0, 0xb7, r1, r2, s)
#define SIGP(r1,r2,d)  _RS_(_R(r1), 0xae, r1, r2, d)
#define STCTL(r1,r2,s) _RS_(0, 0xb6, r1, r2, s)
#define TRACE(r1,r2,s) _RS_(0, 0x99, r1, r2, s)
#define RRBE(r2)     _RRE_(0, 0xb22a, 0, r2)
#define ISKE(r1,r2)  _RRE_(_R(r1), 0xb229, r1, r2)
#define IVSK(r1,r2)  _RRE_(_R(r1), 0xb223, r1, r2)
#define IPTE(r1,r2)  _RRE_(0, 0xb221, r1, r2)
#define SSKE(r1,r2)  _RRE_(0, 0xb22b, r1, r2)
#define TB(r2)       _RRE_(R0, 0xb22c, 0, r2)
#define TPROT(s,d) _SSE_(0, 0xe501, s, d)
#define IPK()    _S_(R2, 0xb20b, 0)
#define LPSW(s)  _S_(0, 0x8200, s)
#define PTLB()   _S_(0, 0xb20d, 0)
#define RRB(s)   _S_(0, 0xb213, s)
#define SCK(s)   _S_(0, 0xb204, s)
#define SCKC(s)  _S_(0, 0xb206, s)
#define SPT(s)   _S_(0, 0xb208, s)
#define SPX(s)   _S_(0, 0xb210, s)
#define SPKA(d)  _S_(0, 0xb20a, d)
#define SSM(s)   _S_(0, 0x8000, s)
#define STCKC(s) _S_(0, 0xb207, s)
#define STAP(s)  _S_(0, 0xb212, s)
#define STIDP(s) _S_(0, 0xb202, s)
#define STPT(s)  _S_(0, 0xb209, s)
#define STPX(s)  _S_(0, 0xb211, s)
/* SIE not supported due to use of R4/R5/R12/R13
#define SIE(s)   _S_(R0+R1+R2+R3+R4+R5+R6+R7+R8+R9+R10+R11+R12+R13,
                     0xb214, s) */
#define MVPG(r1,r2)  _RRE_(0, 0xb254, r1, r2)
#endif

<das370.h>

Dual Address Space Instruction Header

This header file defines the instructions EPAR, ESAR, IAC, LASP, MVCP, MVCS, PT, SAC, SSAR and SACF. (PC is omitted because it modifies register 4, which is not permitted by the compiler.)

/* 370 dual address space instructions */

#ifndef __Inc_DAS370
#define __Inc_DAS370

#define MVCP(s1,r1,s2,r3) _SK_(0, 0xda, r1, r3, s1, s2)
#define MVCS(s1,r1,s2,r3) _SK_(0, 0xdb, r1, r3, s1, s2)
#define EPAR(r1)     _RRE_(0, 0xb226, r1, 0)
#define ESAR(r1)     _RRE_(0, 0xb227, r1, 0)
#define IAC(r1)      _RRE_(0, 0xb224, r1, 0)
#define PT(r1,r2)    _RRE_(0, 0xb228, r1, r2)
#define SSAR(r1)     _RRE_(0, 0xb225, r1, 0)
#define LASP(s,d)  _SSE_(0, 0xe500, s, d)
/* PC not supported due to use of R4
#define PC(d)    _S_(R3+R4+R14, 0xb218, d) */
#define SAC(d)   _S_(0, 0xb219, d)
#define SACF(d)  _S_(0, 0xb2719, d)

#endif

<io370.h>

370-Mode I/O Instructions Header

This header file defines all the I/O instructions listed in the "Input/Output Operations" chapter of IBM System/370 Principles of Operation.

/* 370 I/O instructions */

#define CONCS(d) _S_(0, 0xb200, d)
#define DISCS(d) _S_(0, 0xb201, d)
#define CLRCH(d) _S_(0, 0x9f01, d)
#define CLRIO(d) _S_(0, 0x9d01, d)
#define HDV(d)   _S_(0, 0x9e01, d)
#define HIO(d)   _S_(0, 0x9e00, d)
#define SIO(d)   _S_(0, 0x9c00, d)
#define SIOF(d)  _S_(0, 0x9c01, d)
#define RIO(d)   _S_(0, 0x9c02, d)
#define STIDC(d) _S_(0, 0xb203, d)
#define TCH(d)   _S_(0, 0x9f00, d)
#define TIO(d)   _S_(0, 0x9d00, d)

<ioxa.h>

XA-Mode I/O Instructions Header

This header file defines all the I/O instructions listed in Chapter 13, "I/O Instructions" in IBM SYSTEM/370 XA Principles of Operation.

/* XA I/O instructions */

#define CSCH()   _S_(0, 0xb230, 0)
#define HSCH()   _S_(0, 0xb231, 0)
#define MSCH(s)  _S_(0, 0xb232, s)
#define RCHP()   _S_(0, 0xb23b, 0)
#define RSCH()   _S_(0, 0xb238, 0)
#define SAL()    _S_(0, 0xb237, 0)
#define SCHM()   _S_(0, 0xb23c, 0)
#define SSCH(s)  _S_(0, 0xb233, s)
#define STCPS(s) _S_(0, 0xb23a, s)
#define STCRW(s) _S_(0, 0xb239, s)
#define STSCH(s) _S_(0, 0xb234, s)
#define TPI(s)   _S_(0, 0xb236, s)
#define TSCH(s)  _S_(0, 0xb235, s)

<vec370.h>

Vector Instructions Header

This header file defines all the vector instructions defined in IBM System/370 Vector Operations. Note that the compiler never accesses or modifies vector registers, so any use of these registers must be done using assembler language subroutines, these macros, or the _code function.

/* 370 vector instructions */

#define VCVM()       _RRE_(0, 0xa641, 0, 0)
#define VCZVM(r1)    _RRE_(_R(r1), 0xa642, r1, 0)
#define VCOVM(r1)    _RRE_(_R(r1), 0xa643, r1, 0)
#define VXVC(r1)     _RRE_(_R(r1), 0xa644, r1, 0)
#define VXVMM(r1)    _RRE_(_R(r1), 0xa646, r1, 0)
#define VLVCU(r1)    _RRE_(_R(r1), 0xa645, r1, 0)
#define VRRS(r1)     _RRE_(_RP(r1), 0xa648, r1, 0)
#define VRSVC(r1)    _RRE_(_RP(r1), 0xa649, r1, 0)
#define VRSV(r1)     _RRE_(_RP(r1), 0xa64a, r1, 0)
#define VTVM()       _RRE_(0, 0xa640, 0, 0)
#define VRCL(d)  _S_(0, 0xa6c5, d)
   .
   .
   .
#define VMNSE(r1,r3,r2) _VR_(_FR(r3)|(_RP(r2) & ~(R0+R1)), 
                             0xa601, r3, r1, r2)
#define VSPSD(r1,r2)    _VR_(_FR(r2), 0xa61a, 0, r1, r2)
#define VZPSD(r1)       _VR_(0, 0xa61b, 0, r1, 0)
#define VLBIX(r1,r3,s) _RSE_(_RP(r3), 0xe428, r3, r1, s)
#define VLI(r1,r3,s)   _RSE_(0, 0xe400, r3, r1, s)
#define VLID(r1,r3,s)  _RSE_(0, 0xe410, r3, r1, s)
#define VLIE(r1,r3,s)  _RSE_(0, 0xe400, r3, r1, s)
#define VSLL(r1,r3,d)  _RSE_(0, 0xe425, r3, r1, d)
#define VSRL(r1,r3,d)  _RSE_(0, 0xe424, r3, r1, d)
#define VSTI(r1,r3,s)  _RSE_(0, 0xe401, r3, r1, s)
#define VSTID(r1,r3,s) _RSE_(0, 0xe411, r3, r1, s)
#define VSTIE(r1,r3,s) _RSE_(0, 0xe401, r3, r1, s)

General Header Files

The header files <code.h> , <regs.h> , and <svc.h> provide symbolic definitions and condition code values used by the built-in functions. The contents of these files are as shown on the following pages.

<code.h>

Code Header File The <code.h> header file contains declarations needed by the macros and the _code function.

#ifndef __IncCode
#define __IncCode

#ifndef __IncRegs
#define __IncRegs
#include <sys370/regs370.h>
#endif


#ifdef __cplusplus
extern "C" {
void __builtin _code(unsigned,...);
void __builtin _label(unsigned);
void __builtin _branch(unsigned,unsigned,unsigned);
void __builtin _bbwd(unsigned,unsigned);
void __builtin _bfwd(unsigned,unsigned);
}
#else
#define _code __builtin_code
#define _label __builtin_label
#define _branch __builtin_branch
#define _bbwd __builtin_bbwd
#define _bfwd __builtin_bfwd
#ifndef _NOLIBCK
void _code(unsigned,...);
void _label(unsigned);
void _branch(unsigned,unsigned,unsigned);
void _bbwd(unsigned,unsigned);
void _bfwd(unsigned,unsigned);
#else
void _code();
void _label();
void _branch();
void _bbwd();
void _bfwd();
#endif
#endif

#define b(n) ((n) << 12)
#define _R(n) (R0 >> (n))
#define _RP(n) ((R0+R1) >> (n))
#define _FR(n) (F0 >> (n))
#define _FRP(n) ((F0+F2) >> (n))
#define _seg(x) ((int) R0 >> (x))
#define _blabel(n) ((unsigned short)(n) + 0x00bb0000)
#define _flabel(n) ((unsigned short)(n) + 0x00bf0000)

#define _RR_(m,o,r1,r2) _code(m, (o)<<8|(r1)<<4|(r2))
#define _RX_(m,o,r1,r2,bd) _code(m, (o)<<8|(r1)<<4|(r2), bd)
#define _BX_(m,o,r1,r2,bd) _branch(m, (o)<<8|(r1)<<4|(r2), bd)
#define _SI_(m,o,i,bd) _code(m, (o)<<8|(i),bd)
#define _SS1_(m,o,l,bd1,bd2) _code(m, (o)<<8|(l?(l)-1:l), bd1, bd2)
#define _SS2_(m,o,l1,l2,bd1,bd2) _code(m, (o)<<8|(l1?(l1)-1:l1)<<4|
                                       (l2?l2-1:l2), bd1, bd2)
#define _SS3_(m,o,l1,i,bd1,bd2) _code(m, (o)<<8|(l1?(l1)-1:l1)<<4|(i),
                                      bd1, bd2)
#define _SK_(m,o,r1,r3,bd1,bd2) _code(m, (o)<<8|(r1)<<4|(r3), bd1, bd2)
#define _I_(m,o,i) _code(m, (o)<<8|(i))
#define _RRI_(m,o,r1,r2,i) _code(m, (o)<<8|(r1)<<4|(r2), i)
#define _RS_(m,o,r1,r2,bd) _code(m, (o)<<8|(r1)<<4|(r2), bd)
#define _BS_(m,o,r1,r2,bd) _branch(m, (o)<<8|(r1)<<4|(r2), bd)
#define _RRE_(m,o,r1,r2) _code(m, o, (r1)<<4|(r2))
#define _S_(m,o,bd) _code(m, o, bd)
#define _E_(m,o) _code(m, o)
#define _VST_(m,o,r3,t2,r1,s2) _code(m, o, (r3)<<12|(t2)<<8|
                                     (r1)<<4|(s2))
#define _VV_(m,o,r3,r1,r2) _code(m, o, (r3)<<12|(r1)<<4|(r2))
#define _QST_(m,o,r3,t2,r1,s2) _code(m, o, (r3)<<12|(t2)<<8|
                                     (r1)<<4|(s2))
#define _QV_(m,o,r3,r1,r2) _code(m, o, (r3)<<12|(r1)<<4|(r2))
#define _VS_(m,o,r2) _code(m, o, r2)
#define _VR_(m,o,r3,r1,r2) _code(m, o, (r3)<<12|(r1)<<4|(r2))
#define _RSE_(m,o,r3,r1,bd) _code(m, o, (r3)<<12|(r1)<<4, bd)

#endif

<regs.h>

The <regs.h> header file contains the symbolic definitions and condition codes used by the _cc , _ldregs , and _stregs functions.

#define R0 0x80000000
#define R1 0x40000000
#define R2 0x20000000
#define R3 0x10000000
#define R6 0x02000000
#define R7 0x01000000
#define R8 0x00800000
#define R9 0x00400000
#define R10 0x00200000
#define R11 0x00100000
#define R12 0x00080000
#define R13 0x00040000
#define R14 0x00020000
#define R15 0x00010000
#define F0 0x00008000
#define F2 0x00002000
#define F4 0x00000800
#define F6 0x00000200

#define CC0 0
#define CC1 (-1)
#define CC2 2
#define CC3 3
#define CCZ 0
#define CCE 0
#define CCL (-1)
#define CCM (-1)
#define CCH 2
#define CCP 2
#define CCO 3

#ifdef __cplusplus
extern "C" {
extern void __builtin _ldregs(unsigned,...);
extern int __builtin _stregs(unsigned,...);
extern int __builtin _cc(void);
}
#else
#define _ldregs __builtin_ldregs
#define _stregs __builtin_stregs
#define _cc     __builtin_cc

#ifndef _NOLIBCK
extern void _ldregs(unsigned,...);
extern int _stregs(unsigned,...);
extern int _cc(void);
#else
extern void _ldregs();
extern int _stregs();
extern int _cc();
#endif
#endif

<svc.h>

Supervisor Control Header File

The <svc.h> header file contains the symbolic definitions and condition codes used by the _cms202 , _diag , and _ossvc functions.

#ifndef __IncSvc
#define __IncSvc

#ifndef __IncRegs
#define __IncRegs
#include <regs.h>
#endif

#define _ossvc  __builtin_ossvc
#define _cms202 __builtin_cms202
#define _diag   __builtin_diag

#define SVC202(r1) (_ldregs(R1,r1),_cms202(),_stregs(R15))
#define e_SVC202(r0,r1) 
(_ldregs(R0|R1,r0,0x01000000|(unsigned) (r1)),_cms202(),_stregs(R15))

#ifndef _NOLIBCK
extern void _ossvc(int);
extern void _cms202(void);
extern void _diag(int);
#else
extern void _ossvc();
extern void _cms202();
extern void _diag();
#endif

Chapter Contents
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`<ctl370.h>`	problem state program control instructions
`<das370.h>`	dual address space instructions
`<dec370.h>`	decimal instructions
`<float370.h>`	floating-point instructions
`<genl370.h>`	general-purpose instructions
`<io370.h>`	370-mode I/O instructions
`<ioxa.h>`	XA-mode I/O instructions
`<lsa370.h>`	logical string assist instructions
`<str370.h>`	string-handling instructions
`<supv370.h>`	supervisor control instructions
`<vec370.h>`	vector instructions.